Job expirat
- Design team member who is an active participate in layout design of analog products.
- Perform layout of CMOS analog circuits using Cadence tools
- Perform verification of layout adherence to design rules (DRC) and Layout-vs-Schematic checks
- Complete tapeout procedures
Candidates with higher experience will be eligible for Senior and Lead Layout Engineers positions.
- Degree in Electronics, Automatics or Electrical Engineering.
- Should have min. 5+ years experience in layout of CMOS analog circuits
- Should have good knowledge of English and good communication skills
JobFix
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