Job expirat
Design, implementation, partitioning and verification of complex FPGA designs
Interface to the engineers from architecture, implementation, and design verification
Provide support for software integration
Qualification required:
- BSEE degree with a minimum of 2 years in FPGA/ASIC design
Experience required:
Solid knowledge of FPGA digital design techniques/constraints as well as VHDL, synthesis, simulation, timing analysis
Experience with ModelSim, Altera Quartus and Synplify is a plus
Good scripting/programming (tcl, perl) and board-level debugging skills are highly appreciated
Special Skills / Attributes :
- Excellent verbal and written communication skills in English
- Good engineering development practices and documentation
- Team player, proactive and autonomous working style
Industria semiconductorilor, R&D