Job expirat
· Review RTL architectural and specifications implementation.
· Create stimulus drivers, monitors, dataflow models, and test plans to verify function and performance
· of advanced multiprotocol networking Asics.
· Define and develop application tests required to verify ASICs meet functional and performance goals.
· Define and implement functional coverage plans.
· Develop testing and regression methodologies for new verification flow.
· Develop /maintain /enhance environment tools /scripts /make files.
· Develop or maintain ASIC verification environments to support ASIC development.
· Evaluate CAD tools used in the verification process and provided by top-most EDA companies; understand and report tool bugs, provide EDA company feedback about tool usage and suggestions for improvement.
Cerinte
· Graduate Computer Science/Electronics/Mathematics
· Proficiency with OOP (C++, Java)
· Knowledge of Digital Integrated Circuits
· Knowledge of Hardware Description Languages (VHDL/Verilog) desired
· Knowledge of finite state machines, graph theory desired
· Proficiency with Linux OS
· Good English knowledge
· Good communication skills and strong interpersonal skills.
· Open mind and an unparalleled ability to learn a new design and new verification methodologies.
Following skills will be a plus:
Minimum 2 years of experience in verification domain, SV and/or “e” (Specman) languages
· Familiarity with scripting tools and languages (e.g. bash, csh, awk, Perl)
· Familiarity with development tools (e.g. make and versioning tools (e.g. CVS, RCS)
· Familiarity with uVM, eRM, VMM methodologies (from higher to lower interest).
Servicii de depozitare , servicii aferente instalatiilor electrice , servicii conexe , vanzari, servicii management
